|
Functional Description
The xSil 267B is designed to connect
serial interface media to USB. It features the following:
-
Encryption ?AES embedded
-
48-pin 7mm x 7mm QFP package
-
Single chip with integrated USB 2.0 PHY
-
Serial EEPROM port
-
115K Baud Serial port
-
Two General Purpose Timers
-
Watchdog Timer
-
16 bit Processor
-
Programmable Read and Write widths
-
Optimum hardware controlled transfer for speed and
scalability
Packaging
The
xSil 267B is a 48 pin QFP package.
USB
Engine
The xSil 267B meets the Universal Serial Bus (USB)
specification V2.0 and V1.1.
Serial EEPROM Port
The xSil 267B provides a serial interface
to access external EEPROM's. The interface is implemented using General Purpose I/O signals
and can support a variety of serial EEPROM formats.
Serial port
Supports 7200 to 115.2K baud. Is useful as a debug port and can
also be used to access the EEPROM for Reads / Writes from the serial port.
General Purpose Timers
Two general-purpose timers, Timer0 and
Timer1 are provided to allow firmware programmers to keep track of timeouts as well as to
generate delays.
Watchdog Timer
A Watchdog Timer (WT) is provided to
enable catastrophic events to interrupt the processor. The Watchdog Timer
overflow causes an internal processor reset. The Processor can read the WT bit
after exiting reset to determine if the WT bit is set. If it is set, a watchdog
timeout occurred. The timeout is selectable to any of the following values:
1 second, 4 seconds, 8 seconds or 16 seconds.
xSil 267B Processor
The xSil 267B Processor has a
built-in 16-bit processor along with a BIOS ROM. The processor operates with a
specialized instruction set optimized for Mass Storage applications and USB transaction processing.
The start up code for the 16-bit processor resides in a masked ROM.
RAM
Interface
The xSil 267B chip comes with an Internal RAM.
Data is transferred in EHS (Extra High Speed) mode to ensure optimum transfer speeds.
Masked ROM
The Masked ROM consists of the xSil
267B processor start-up code and the functions listed below:
-
Power On Initialization
-
USB packet transaction management
-
USB Power Management (S0..S3 modes)
-
USB Enumeration Management
-
API support for USB transactions, EEPROM Interface,
Memory Management etc.
The
firmware is easily extended / expanded by using
External Serial EEPROM. The BIOS provides several
services to facilitate this expansion code. At boot-up
time, the scan services of the BIOS search for the
expansion signature in the Serial EEPROM as well as
via the UART and USB. For more information, refer to
Applications section of this manual.
The BIOS API functions are designed as Software Interrupts, making it easy for enhancements. Any Interrupt
can be enhanced / modified by inserting the user defined function in the interrupt placeholder. When
this interrupt is called by the BIOS, the user defined function is called first to enhance the behavior
before passing it on to the standard BIOS function?s call or return without passing it on.
Programmable Read and Write cycles
The external cycles to flash using the D[15:0],
and SM[7:0] buses are software configurable |