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Functional
Description
The 90C46C is designed to
connect a wide range of memory cards to a CFTM, PCMCIA, ATAPI or
IDE slot. It contains the following:
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100-pin LQFP package
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Serial EEPROM port
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Host side support
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IDE
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ATAPI
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PCMCIA
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Card side support:
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Memory StickTM
/ Memory Stick ProTM / Memory Stick DuoTM
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Secure DigitalTM
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SDTM / Mini
SDTM / Micro SDTM
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MMCTM / RS
MMCTM / MMC MicroTM
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CompactFlashTM
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MicrodriveTM
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SmartMediaTM
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xDTM
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PCMCIA
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Serial
port
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Two
General Purpose Timers
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Watchdog Timer
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16 bit Processor
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Supports 4-bit mode
transfers for Memory Stick PRO and Memory Stick HS media
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Supports 1-bit ECC for
NAND, NAND MLC and NAND Big block flash media
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Programmable read and
write widths
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OnSpec?s patent pending
EDMA technology for optimum data transfer
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Supports PIO 4 mode
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ATA-4 spec compliant*
* - As applicable to Flash
media
Packaging
OnSpec 90C46C is a
100-pin LQFP package.
PCMCIA/IDE Interfaces
The 90C46C provides a
slave interface to a CF, PCMICA, or IDE slot. Memory Mode, I/O Mode, and
True IDE modes are supported. Please refer to Configuration Option Registers
for more details.
Serial EEPROM Port
The 90C46C provides a
serial interface to access external EEPROM's. The interface is implemented
using General Purpose I/O signals and can support a variety of serial EEPROM
formats.
Support for CF, MMC / SD, Memory Stick and SmartMedia Cards
The MultiMediaCard (MMC),
Secure Digital Card (SD Card) and Memory Stick are serial access devices.
They also require in-bound / out-bound data to be appended with CRC
information. The 90C46C processor provides support in hardware to generate
the CRC and to convert Serial to Parallel and Parallel to Serial bit
streams. A programmable clock speed is provided to set the clock speed based
on the media?s capabilities. The 90C46C also provides ECC generation and
checking for SmartMedia. CF cards may be connected directly as an IDE
device.
Serial port
Supports 7200 to 115.2K
bauds. It is useful as a debug port and can also be used to access the
EEPROM for Reads / Writes from the serial port.
General Purpose Timers
Two general-purpose
timers, Timer0 and Timer1 are provided to allow firmware programmers to keep
track of timeouts as well as to generate delays.
Watchdog Timer
A Watchdog Timer is
provided to enable catastrophic events to interrupt the processor. The
Watchdog Timer overflow causes an internal processor reset. The Processor
can read the WT bit after exiting reset to determine if the WT bit is set.
If it is set, a watch dog timeout occurred.
90C46C Processor
The 90C46C Processor has a
built-in 16-bit processor along with a BIOS ROM. The processor operates with
a specialized instruction set optimized for Mass Storage applications and CF
transaction processing. The start up code for the 16-bit processor resides
in a masked ROM.
RAM
The
90C46C chip comes with an Internal RAM.
Masked ROM
The Masked ROM consists of
start-up code for the 90C46C processor and many other functions as listed
below:
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Power On Initialization
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Scan for External ROM
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CF
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API support for CF
transactions, EEPROM Interface, Memory Management etc.
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Built-in Library
functions for Flash devices
The firmware can be easily
extended / expanded by using External Serial EEPROM. BIOS provides several
services to facilitate this expansion code. At boot-up time, the scan
services of the BIOS search for the expansion signature in Serial EEPROM as
well as via the UART. For more information on this, refer to Applications
section of this manual.
The BIOS API functions are
designed as Software Interrupts, making it easy for enhancements. Any
Interrupt can be enhanced / modified by inserting user defined function in
the interrupt placeholder. When this interrupt is called by the BIOS, the
user defined function gets called first so it can enhance the behavior
before passing it on to the standard BIOS function call or return without
passing it on.
Programmable RD and WR
cycles
The
external cycles to SmartMedia are software configurable
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